Average Ratings 0 Ratings
Average Ratings 0 Ratings
Description
Ansys PathFinder-SC serves as a robust and scalable solution designed to facilitate the planning, verification, and approval of IP and full-chip SoC designs, ensuring their integrity and resilience against electrostatic discharge (ESD). This innovative tool effectively identifies and isolates the underlying sources of design problems that could lead to chip failures due to charged-device model (CDM), human body model (HBM), or various ESD incidents. With its cloud-native architecture capable of harnessing thousands of compute cores, PathFinder-SC significantly accelerates full-chip turnaround times. Endorsed by leading foundries for current density assessments and ESD approval, it stands out as a reliable choice in the industry. The platform's comprehensive data modeling, extraction, and transient simulation engine provides an all-encompassing solution for ESD verification. Utilizing a single-pass model, it seamlessly reads industry-standard design formats, establishes ESD rules, extracts RCs for the power network, and conducts ESD simulations to pinpoint root causes while offering repair and optimization suggestions, all consolidated within one powerful tool. This streamlined process not only enhances efficiency but also reduces the time-to-market for critical design projects.
Description
Our advanced web platform significantly enhances the productivity of chip developers and verification engineers, allowing them to design and troubleshoot at a pace ten times quicker than before. With Verilator, users can effortlessly initiate and execute thousands of tests simultaneously with just one click. It also facilitates the easy sharing of test outcomes and waveforms within the organization, allows for tagging colleagues on specific signals, and provides robust tracking of test and regression failures. By utilizing Verilator to create Dockerized simulation binaries, we efficiently distribute test executions across our computing cluster, after which we gather the results and log files and have the option to rerun any tests that failed to produce waveforms. The incorporation of Docker ensures that the test executions are both consistent and reproducible. SiLogy ultimately boosts the efficiency of chip developers by shortening the time required for design and debugging processes. Prior to the advent of SiLogy, the leading method for diagnosing a failing test entailed manually copying lines from log files, analyzing waveforms on personal machines, or rerunning simulations that could take an inordinate amount of time, often spanning several days. Now, with our platform, engineers can focus more on innovation rather than being bogged down by cumbersome debugging processes.
API Access
Has API
API Access
Has API
Integrations
Docker
GitHub
Pricing Details
No price information available.
Free Trial
Free Version
Pricing Details
No price information available.
Free Trial
Free Version
Deployment
Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook
Deployment
Web-Based
On-Premises
iPhone App
iPad App
Android App
Windows
Mac
Linux
Chromebook
Customer Support
Business Hours
Live Rep (24/7)
Online Support
Customer Support
Business Hours
Live Rep (24/7)
Online Support
Types of Training
Training Docs
Webinars
Live Training (Online)
In Person
Types of Training
Training Docs
Webinars
Live Training (Online)
In Person
Vendor Details
Company Name
Ansys
Founded
1970
Country
United States
Website
www.ansys.com/products/semiconductors/ansys-pathfinder-sc
Vendor Details
Company Name
SiLogy
Founded
2023
Country
United States
Website
silogy.io
Product Features
PCB Design
3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor
Simulation
1D Simulation
3D Modeling
3D Simulation
Agent-Based Modeling
Continuous Modeling
Design Analysis
Direct Manipulation
Discrete Event Modeling
Dynamic Modeling
Graphical Modeling
Industry Specific Database
Monte Carlo Simulation
Motion Modeling
Presentation Tools
Stochastic Modeling
Turbulence Modeling
Product Features
PCB Design
3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor